1. Technical Field
The present invention relates to a semiconductor memory apparatus, and more particularly, to a data output driving circuit of a semiconductor memory apparatus.
2. Related Art
In general, a semiconductor memory apparatus includes a plurality of drivers that have predetermined impedance values so, as to correspond to various data input and output impedances and can obtain the various input and output impedances by selectively operating the plurality of drivers.
As shown in FIG. 1, a data output driving circuit of the semiconductor memory apparatus according to the related art includes a plurality of drivers 40; an impedance adjusting unit 10 that outputs a first code PC<0:5> and a second code NC<0:5> to adjust the impedance of the drivers so that the total impedance is equal to a set value; a plurality of driver control units 20 that determine whether or not to output the first code PC<0:5> and the second code NC<0:5> according to a driver enable signal stinf<0:6>; a plurality of data processing units 30 that output data (UP: pull-up data and DN: pull-down data) to the plurality of drivers 40, according to the first code PC<0:5> and the second code NC<0:5>; and a pad 50 that is commonly connected to the output terminals of the plurality of drivers 40, and outputs the data or receives data.
FIG. 1 depicts an example in which seven drivers with the same impedance value (i.e., 240 ohm), seven driver control units 20, and seven data processing units 30 are used.
Each of the plurality of drivers 40 of FIG. 1 includes a pull-up driver and a pull-down driver. The pull-up driver includes a plurality of PMOS transistors that have sources connected in common to a power supply terminal VDDQ and drains respectively connected to resistors. The pull-down driver includes a plurality of NMOS transistors that have sources connected in common to a ground terminal and drains respectively connected to data pull-down resistors. Each of the pull-up drivers and the pull-down drivers include, for example, six resistors and six transistors for controlling the connection of the resistors. The number of resistors and the number of transistors may vary according to the circuit design.
Referring to FIG. 1, the operation of the data output driving circuit for the semiconductor memory apparatus according to the related art will now be described.
The impedance adjusting unit 10 outputs the first code PC<0:5> and the second code NC<0:5> for adjusting the impedance of each of the drivers, so as to correct a difference between the impedance value and a predetermined set value.
According to the driver enable signal stinf<0:6>, the seven driver control units 20 output the first code PC<0:5> and the second code NC<0:5> output from the impedance adjusting unit 10 to the seven data processing units 30, or the seven driver control units 20 intercept the output of the first code PC<0:5> and the second code NC<0:5> by setting the code values of the first code PC<0:5> and the second code NC<0:5> to predetermined values (e.g., 0).
When the first code PC<0:5> and the second code NC<0:5> are input, the seven data processing units 30 output pull-up data UP to the pull-up drivers of the seven drivers 40 according to the first code PC<0:5>, and output pull-down data DN to the pull-down drivers of the seven drivers 40 according to the second code NC<0:5>.
Therefore, a data driving operation is performed according to a driving impedance value on the basis of an impedance combination of the drivers, which have received the data, among the seven drivers 40.
According to the related art, the impedance of the driver is determined on the basis of the largest value among driving impedance values required for a system, and the number of drivers that have the same determined impedance is determined, such that various driving impedances required for the system can be obtained.
For example, when the maximum value of the driving impedance required for the system is 240 ohm, and the minimum value is 34 ohm, as shown in FIG. 1, 240 ohm drivers are used. In order to obtain the minimum value of 34 ohm, the seven 240 ohm drivers are used. The number of drivers used-is based on the principle of the parallel connections of resistors.
That is, when a 34 ohm driver is necessary, all of the seven 240 ohm drivers are connected in parallel to one another to obtain a value of 1/( 1/240+ 1/240+ 1/240+ 1/240+ 1/240+ 1/240+ 1/240)=240/7=34.285 . . . . If a small difference occurs (for example, a difference of a decimal fraction), this does not affect the driving operation. Therefore, the difference may be ignored.
When a 40 ohm driver is required, six drivers among the seven 240 ohm drivers are connected in parallel to one another to obtain a value of 1/( 1/240+ 1/240+ 1/240+ 1/240+ 1/240+ 1/240)=240/6=40.
When a 60 ohm driver is required, four 240 ohm drivers among the seven 240 ohm drivers are connected in parallel to one another. When an 80 ohm driver is required, three 240 ohm drivers among the seven 240 ohm drivers are connected in parallel to one another. When a 120 ohm driver is required, two 240 ohm drivers among the seven 240 ohm drivers are connected in parallel to each other. When a 240 ohm driver is required, one of the seven 240 ohm drivers is used. As such, the seven drivers are selectively operated to thereby obtain the driving impedance required for the system.
At this time, MOS (Metal on Silicide) resistors and passive resistors are used together in the drivers. In order to achieve linear driving, the number of passive resistors needs to be much larger than the number of the MOS resistors. For example, in the case of the 240 ohm driver, the MOS resistors and the passive resistors have a ratio of approximately 2:8.
Since a MOS resistor has a larger resistance value per unit area than that of a passive resistor, a passive resistor needs to have an area larger than a MOS resistor for the same resistance value. A MOS resistor uses an active region, while a passive resistor uses a gate region and a poly region where a complex control operation can be performed.
Therefore, the area of the drivers is determined according to the passive resistors. According to the related art, the higher the impedance a driver has, the larger the number of passive resistors used Therefore, the drivers occupy a large area in the semiconductor memory apparatus.
In addition, the capacitance of a driver is determined according to a junction capacitance and a parasitic capacitance. Between the two capacitances, the junction capacitance occupies the most capacitance. Since a passive resistor has a larger parasitic capacitance than a junction capacitor, the capacitance increases as the number of passive resistors increases.
Therefore, the data output driving circuit of a semiconductor memory apparatus according to the related art has the following problems.
First, as described above, as the impedance of the driver increases, the size of the driver increases. According to the related art, since a plurality of drivers that have high impedance values are used, the size of the semiconductor memory apparatus is increased.
Second, since the number of passive resistors is increased due to the plurality of high impedance drivers, the capacitance is increased, which deteriorates the impedance characteristics of the drivers.